// Copyright 2020 Google LLC // // This source code is licensed under the BSD-style license found in the // LICENSE file in the root directory of this source tree. $assert ROW_TILE >= 1 $assert ACCUMULATORS >= 1 #include #include #include #include void xnn_f16_dwconv2d_chw_ukernel_5x5s2p2__neonfp16arith_${ROW_TILE}x4${"_acc%d" % ACCUMULATORS if ACCUMULATORS > 1 else ""}( size_t input_height, size_t input_width, const void* input, const void* weights, const void* zero, void* output, uint32_t padding_top, const union xnn_f16_chw_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS { assert(input_height != 0); assert(input_width != 0); assert(input_width % sizeof(__fp16) == 0); assert(padding_top >= 1); assert(padding_top <= 2); const uint16x4_t vmask_even = vld1_u16(params->neonfp16arith.mask_even); const uint16x4_t vmask_odd = vld1_u16(params->neonfp16arith.mask_odd); const float16x4_t vmax = vld1_dup_f16(¶ms->neonfp16arith.max); const float16x4_t vmin = vld1_dup_f16(¶ms->neonfp16arith.min); const __fp16* w0 = (const __fp16*)weights; const float16x8_t vw01234567 = vld1q_f16(w0); const float16x8_t vw89ABCDEF = vld1q_f16(w0 + 8); const float16x8_t vwGHIJKLMN = vld1q_f16(w0 + 16); const float16x4_t vwOP = vreinterpret_f16_u32(vld1_lane_u32((const void*)(w0 + 24), vmov_n_u32(0), 0)); const uint32_t padding_top_less_1 = padding_top - 1; const size_t input_decrement = round_up_po2(input_width, 8 * sizeof(__fp16)); const __fp16* i0 = zero; const __fp16* i1 = (const __fp16*) ((uintptr_t) input - ((-padding_top_less_1) & input_width)); const __fp16* i2 = (const __fp16*) ((uintptr_t) i1 + input_width); if XNN_UNPREDICTABLE(padding_top_less_1 != 0) { i1 = zero; } $for M in range(3, 3 + 2 * ROW_TILE): const __fp16* i${M} = (const __fp16*) ((uintptr_t) i${M-1} + input_width); $if ROW_TILE > 1: const size_t output_width = round_down_po2((input_width + (2 /* padding */ - 3 /* kernel size */ + 2 /* subsampling */) * sizeof(__fp16)) / 2, sizeof(__fp16)); __fp16* o0 = output; $for M in range(1, ROW_TILE): __fp16* o${M} = (__fp16*) ((uintptr_t) o${M-1} + output_width); size_t padded_input_height = input_height + (padding_top_less_1 + 1) + 2 /* padding bottom */; size_t output_height = (padded_input_height - 5 /* kernel size */ + 2 /* subsampling */) / 2; do { $for M in range(3, 3 + 2 * ROW_TILE): if XNN_UNPREDICTABLE(padded_input_height < ${3 + M}) { i${M} = zero; $if M % 2 == 0 and M <= 2 * ROW_TILE + 1: o${M // 2 - 1} = o${M // 2 - 2}; } $for M in range(3 + 2 * ROW_TILE): float16x4_t vi${M}x0246 = vmov_n_f16(0.0f); $for M in range(3 + 2 * ROW_TILE): float16x4_t vi${M}x1357 = vmov_n_f16(0.0f); $for M in range(3 + 2 * ROW_TILE): float16x4x2_t vi${M}x8ACE9BDF = vld2_f16(i${M}); i${M} += 8; size_t w = input_width; for (; w > 8 * sizeof(__fp16); w -= 8 * sizeof(__fp16)) { $for M in range(ROW_TILE): float16x4_t vo${M}p0 = vdup_laneq_f16(vw01234567, 0); $for M in range(ROW_TILE): $if ACCUMULATORS > 1: float16x4_t vo${M}p1 = vmul_laneq_f16(vi${2*M}x8ACE9BDF.val[0], vw01234567, 3); $else: vo${M}p0 = vfma_laneq_f16(vo${M}p0, vi${2*M}x8ACE9BDF.val[0], vw01234567, 3); $for M in range(ROW_TILE): $if ACCUMULATORS > 2: float16x4_t vo${M}p2 = vmul_laneq_f16(vi${2*M+1}x8ACE9BDF.val[0], vw89ABCDEF, 0); $else: vo${M}p0 = vfma_laneq_f16(vo${M}p0, vi${2*M+1}x8ACE9BDF.val[0], vw89ABCDEF, 0); $for M in range(ROW_TILE): $if ACCUMULATORS > 3: float16x4_t vo${M}p3 = vmul_laneq_f16(vi${2*M+2}x8ACE9BDF.val[0], vw89ABCDEF, 5); $else: vo${M}p${4 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${4 % ACCUMULATORS}, vi${2*M+2}x8ACE9BDF.val[0], vw89ABCDEF, 5); $for M in range(ROW_TILE): $if ACCUMULATORS > 4: float16x4_t vo${M}p4 = vmul_laneq_f16(vi${2*M+3}x8ACE9BDF.val[0], vwGHIJKLMN, 2); $else: vo${M}p${5 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${5 % ACCUMULATORS}, vi${2*M+3}x8ACE9BDF.val[0], vwGHIJKLMN, 2); $for M in range(ROW_TILE): $if ACCUMULATORS > 5: vo${M}p5 = vmul_laneq_f16(vi${2*M+4}x8ACE9BDF.val[0], vwGHIJKLMN, 7); $else: vo${M}p${6 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${6 % ACCUMULATORS}, vi${2*M+4}x8ACE9BDF.val[0], vwGHIJKLMN, 7); $for M in range(ROW_TILE): vo${M}p${7 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${7 % ACCUMULATORS}, vi${2*M}x8ACE9BDF.val[1], vw01234567, 4); $for M in range(ROW_TILE): vo${M}p${8 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${8 % ACCUMULATORS}, vi${2*M+1}x8ACE9BDF.val[1], vw89ABCDEF, 1); $for M in range(ROW_TILE): vo${M}p${9 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${9 % ACCUMULATORS}, vi${2*M+2}x8ACE9BDF.val[1], vw89ABCDEF, 6); $for M in range(ROW_TILE): vo${M}p${10 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${10 % ACCUMULATORS}, vi${2*M+3}x8ACE9BDF.val[1], vwGHIJKLMN, 3); $for M in range(ROW_TILE): vo${M}p${11 % ACCUMULATORS} = vfma_lane_f16(vo${M}p${11 % ACCUMULATORS}, vi${2*M+4}x8ACE9BDF.val[1], vwOP, 0); $for M in range(3 + 2 * ROW_TILE): const float16x4_t vi${M}x68AC = vext_f16(vi${M}x0246, vi${M}x8ACE9BDF.val[0], 3); vi${M}x0246 = vi${M}x8ACE9BDF.val[0]; $for M in range(ROW_TILE): vo${M}p${12 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${12 % ACCUMULATORS}, vi${2*M}x68AC, vw01234567, 1); $for M in range(ROW_TILE): vo${M}p${13 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${13 % ACCUMULATORS}, vi${2*M+1}x68AC, vw01234567, 6); $for M in range(ROW_TILE): vo${M}p${14 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${14 % ACCUMULATORS}, vi${2*M+2}x68AC, vw89ABCDEF, 3); $for M in range(ROW_TILE): vo${M}p${15 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${15 % ACCUMULATORS}, vi${2*M+3}x68AC, vwGHIJKLMN, 0); $for M in range(ROW_TILE): vo${M}p${16 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${16 % ACCUMULATORS}, vi${2*M+4}x68AC, vwGHIJKLMN, 5); $for M in range(3 + 2 * ROW_TILE): const float16x4_t vi${M}x79BD = vext_f16(vi${M}x1357, vi${M}x8ACE9BDF.val[1], 3); vi${M}x1357 = vi${M}x8ACE9BDF.val[1]; $for M in range(3 + 2 * ROW_TILE): const float16x4x2_t vi${M}xGIKMHJLN = vld2_f16(i${M}); i${M} += 8; $for M in range(ROW_TILE): vo${M}p${17 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${17 % ACCUMULATORS}, vi${2*M}x79BD, vw01234567, 2); $for M in range(ROW_TILE): vo${M}p${18 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${18 % ACCUMULATORS}, vi${2*M+1}x79BD, vw01234567, 7); $for M in range(ROW_TILE): vo${M}p${19 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${19 % ACCUMULATORS}, vi${2*M+2}x79BD, vw89ABCDEF, 4); $for M in range(ROW_TILE): vo${M}p${20 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${20 % ACCUMULATORS}, vi${2*M+3}x79BD, vwGHIJKLMN, 1); $for M in range(ROW_TILE): vo${M}p${21 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${21 % ACCUMULATORS}, vi${2*M+4}x79BD, vwGHIJKLMN, 6); $for M in range(3 + 2 * ROW_TILE): const float16x4_t vi${M}xACEG = vext_f16(vi${M}x8ACE9BDF.val[0], vi${M}xGIKMHJLN.val[0], 1); vi${M}x8ACE9BDF = vi${M}xGIKMHJLN; $for M in range(ROW_TILE): vo${M}p${22 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${22 % ACCUMULATORS}, vi${2*M}xACEG, vw01234567, 5); $for M in range(ROW_TILE): vo${M}p${23 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${23 % ACCUMULATORS}, vi${2*M+1}xACEG, vw89ABCDEF, 2); $for M in range(ROW_TILE): vo${M}p${24 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${24 % ACCUMULATORS}, vi${2*M+2}xACEG, vw89ABCDEF, 7); $for M in range(ROW_TILE): vo${M}p${25 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${25 % ACCUMULATORS}, vi${2*M+3}xACEG, vwGHIJKLMN, 4); $for M in range(ROW_TILE): vo${M}p${26 % ACCUMULATORS} = vfma_lane_f16(vo${M}p${26 % ACCUMULATORS}, vi${2*M+4}xACEG, vwOP, 1); $if ACCUMULATORS > 1: $ACC_SLICE = 1 $while ACC_SLICE < ACCUMULATORS: $for A in range(0, ACCUMULATORS, ACC_SLICE * 2): $if A + ACC_SLICE < ACCUMULATORS: $for M in range(ROW_TILE): vo${M}p${A} = vadd_f16(vo${M}p${A}, vo${M}p${A + ACC_SLICE}); $ACC_SLICE *= 2 $for M in range(ROW_TILE): float16x4_t vo${M} = vmax_f16(vo${M}p0, vmin); $for M in range(ROW_TILE): vo${M} = vmin_f16(vo${M}, vmax); $for M in reversed(range(ROW_TILE)): vst1_f16(o${M}, vo${M}); o${M} += 4; } // Last block has 1-8 pixels to process. assert(w <= 8 * sizeof(__fp16)); assert(w >= 1 * sizeof(__fp16)); { $for M in range(ROW_TILE): float16x4_t vo${M}p0 = vdup_laneq_f16(vw01234567, 0); $for M in range(3 + 2 * ROW_TILE): const float16x4_t vi${M}x8ACE = vreinterpret_f16_u16(vand_u16(vmask_even, vreinterpret_u16_f16(vi${M}x8ACE9BDF.val[0]))); $for M in range(3 + 2 * ROW_TILE): const float16x4_t vi${M}x9BDF = vreinterpret_f16_u16(vand_u16(vmask_odd, vreinterpret_u16_f16(vi${M}x8ACE9BDF.val[1]))); $for M in range(ROW_TILE): $if ACCUMULATORS > 1: float16x4_t vo${M}p1 = vmul_laneq_f16(vi${2*M}x8ACE, vw01234567, 3); $else: vo${M}p0 = vfma_laneq_f16(vo${M}p0, vi${2*M}x8ACE, vw01234567, 3); $for M in range(ROW_TILE): $if ACCUMULATORS > 2: float16x4_t vo${M}p2 = vmul_laneq_f16(vi${2*M+1}x8ACE, vw89ABCDEF, 0); $else: vo${M}p0 = vfma_laneq_f16(vo${M}p0, vi${2*M+1}x8ACE, vw89ABCDEF, 0); $for M in range(ROW_TILE): $if ACCUMULATORS > 3: float16x4_t vo${M}p3 = vmul_laneq_f16(vi${2*M+2}x8ACE, vw89ABCDEF, 5); $else: vo${M}p${4 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${4 % ACCUMULATORS}, vi${2*M+2}x8ACE, vw89ABCDEF, 5); $for M in range(ROW_TILE): $if ACCUMULATORS > 4: float16x4_t vo${M}p4 = vmul_laneq_f16(vi${2*M+3}x8ACE, vwGHIJKLMN, 2); $else: vo${M}p${5 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${5 % ACCUMULATORS}, vi${2*M+3}x8ACE, vwGHIJKLMN, 2); $for M in range(ROW_TILE): $if ACCUMULATORS > 5: vo${M}p5 = vmul_laneq_f16(vi${2*M+4}x8ACE, vwGHIJKLMN, 7); $else: vo${M}p${6 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${6 % ACCUMULATORS}, vi${2*M+4}x8ACE, vwGHIJKLMN, 7); $for M in range(ROW_TILE): vo${M}p${7 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${7 % ACCUMULATORS}, vi${2*M}x9BDF, vw01234567, 4); $for M in range(ROW_TILE): vo${M}p${8 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${8 % ACCUMULATORS}, vi${2*M+1}x9BDF, vw89ABCDEF, 1); $for M in range(ROW_TILE): vo${M}p${9 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${9 % ACCUMULATORS}, vi${2*M+2}x9BDF, vw89ABCDEF, 6); $for M in range(ROW_TILE): vo${M}p${10 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${10 % ACCUMULATORS}, vi${2*M+3}x9BDF, vwGHIJKLMN, 3); $for M in range(ROW_TILE): vo${M}p${11 % ACCUMULATORS} = vfma_lane_f16(vo${M}p${11 % ACCUMULATORS}, vi${2*M+4}x9BDF, vwOP, 0); $for M in range(3 + 2 * ROW_TILE): const float16x4_t vi${M}x68AC = vext_f16(vi${M}x0246, vi${M}x8ACE, 3); $for M in range(ROW_TILE): vo${M}p${12 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${12 % ACCUMULATORS}, vi${2*M}x68AC, vw01234567, 1); $for M in range(ROW_TILE): vo${M}p${13 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${13 % ACCUMULATORS}, vi${2*M+1}x68AC, vw01234567, 6); $for M in range(ROW_TILE): vo${M}p${14 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${14 % ACCUMULATORS}, vi${2*M+2}x68AC, vw89ABCDEF, 3); $for M in range(ROW_TILE): vo${M}p${15 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${15 % ACCUMULATORS}, vi${2*M+3}x68AC, vwGHIJKLMN, 0); $for M in range(ROW_TILE): vo${M}p${16 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${16 % ACCUMULATORS}, vi${2*M+4}x68AC, vwGHIJKLMN, 5); $for M in range(3 + 2 * ROW_TILE): const float16x4_t vi${M}x79BD = vext_f16(vi${M}x1357, vi${M}x9BDF, 3); $for M in range(ROW_TILE): vo${M}p${17 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${17 % ACCUMULATORS}, vi${2*M}x79BD, vw01234567, 2); $for M in range(ROW_TILE): vo${M}p${18 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${18 % ACCUMULATORS}, vi${2*M+1}x79BD, vw01234567, 7); $for M in range(ROW_TILE): vo${M}p${19 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${19 % ACCUMULATORS}, vi${2*M+2}x79BD, vw89ABCDEF, 4); $for M in range(ROW_TILE): vo${M}p${20 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${20 % ACCUMULATORS}, vi${2*M+3}x79BD, vwGHIJKLMN, 1); $for M in range(ROW_TILE): vo${M}p${21 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${21 % ACCUMULATORS}, vi${2*M+4}x79BD, vwGHIJKLMN, 6); const float16x4_t vzero = vmov_n_f16(0.0f); $for M in range(3 + 2 * ROW_TILE): const float16x4_t vi${M}xACEG = vext_f16(vi${M}x8ACE, vzero, 1); $for M in range(ROW_TILE): vo${M}p${22 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${22 % ACCUMULATORS}, vi${2*M}xACEG, vw01234567, 5); $for M in range(ROW_TILE): vo${M}p${23 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${23 % ACCUMULATORS}, vi${2*M+1}xACEG, vw89ABCDEF, 2); $for M in range(ROW_TILE): vo${M}p${24 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${24 % ACCUMULATORS}, vi${2*M+2}xACEG, vw89ABCDEF, 7); $for M in range(ROW_TILE): vo${M}p${25 % ACCUMULATORS} = vfma_laneq_f16(vo${M}p${25 % ACCUMULATORS}, vi${2*M+3}xACEG, vwGHIJKLMN, 4); $for M in range(ROW_TILE): vo${M}p${26 % ACCUMULATORS} = vfma_lane_f16(vo${M}p${26 % ACCUMULATORS}, vi${2*M+4}xACEG, vwOP, 1); $if ACCUMULATORS > 1: $ACC_SLICE = 1 $while ACC_SLICE < ACCUMULATORS: $for A in range(0, ACCUMULATORS, ACC_SLICE * 2): $if A + ACC_SLICE < ACCUMULATORS: $for M in range(ROW_TILE): vo${M}p${A} = vadd_f16(vo${M}p${A}, vo${M}p${A + ACC_SLICE}); $ACC_SLICE *= 2 $for M in range(ROW_TILE): float16x4_t vo${M} = vmax_f16(vo${M}p0, vmin); $for M in range(ROW_TILE): vo${M} = vmin_f16(vo${M}, vmax); size_t w_tmp = (w + 1 * sizeof(__fp16)) / (2 * sizeof(__fp16)); if XNN_LIKELY(w_tmp >= 4) { $for M in reversed(range(ROW_TILE)): vst1_f16(o${M}, vo${M}); o${M} += 4; } else { if (w_tmp & 2) { $for M in reversed(range(ROW_TILE)): vst1_lane_u32((void*) o${M}, vreinterpret_u32_f16(vo${M}), 0); o${M} += 2; $for M in range(ROW_TILE): vo${M} = vext_f16(vo${M}, vo${M}, 2); } if (w_tmp & 1) { $for M in reversed(range(ROW_TILE)): vst1_lane_f16(o${M}, vo${M}, 0); o${M} += 1; } } } i0 = (const __fp16*) ((uintptr_t) i${2 * ROW_TILE} - input_decrement); i1 = (const __fp16*) ((uintptr_t) i${2 * ROW_TILE + 1} - input_decrement); i2 = (const __fp16*) ((uintptr_t) i${2 * ROW_TILE + 2} - input_decrement); $for M in range(3, 3 + 2 * ROW_TILE): i${M} = (const __fp16*) ((uintptr_t) i${M-1} + input_width); $if ROW_TILE > 1: o0 = o${ROW_TILE - 1}; $for M in range(1, ROW_TILE): o${M} = (__fp16*) ((uintptr_t) o${M-1} + output_width); $if ROW_TILE > 1: output_height = doz(output_height, ${ROW_TILE}); padded_input_height = doz(padded_input_height, ${ROW_TILE * 2}); $else: output_height -= 1; padded_input_height -= 2; } while (output_height != 0); }